技術系（機械設計・製造技術） - LSI・IC・メモリ設計
技術系（機械設計・製造技術） - パッケージ開発

In this role, you will ensure functionality and performance of the system.

This role is hybrid, based out of Tokyo, Japan.

We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting.

Responsibilities:
Verify Tenstorrent’s digital IP and SoC logic at chiplet integration level, using predominantly an UVM based verification methodology,
Build and improve components of verification infrastructure including model builds and simulation/regression runs,
Create verification components like testbenches, checkers and test generators,
Add assertions and coverages along associated methodologies,
Build verification test plans for subsystems, align them with project stakeholders, implement test suites, summarize the results and share feedback with project stakeholders
Publish and review verification metrics and drive convergence towards tape-out,
Work across boundaries with architects, software and design/emulation teams,
Guide and mentor junior engineers.

■休日：完全週休二日制, 土, 日, 祝日, GW, 夏季休暇, 年末年始

Experience & Qualifications:
Bachelor, Master or PhD degree in electrical, computer engineering or computer science
At least 8 years industry experience in CPU or SoC verification
Experience with verification flows, scripting and automation
Good knowledge of logic design
Knowledge of Verilog//v2k/system Verilog
Strong problem solving skills
Excellent organizational and communication skills
Good English language skills (written and spoken)


Nice to Have
Knowledge of RISC-V, machine learning, die-to-die, memory controllers, PCIe, UCIe
Knowledge of low level drivers and firmware in C
Fluency in Japanese
Japanese work visa

■職種未経験者：不可